1. Field of the Invention
The present invention relates to the generation of high-speed clock signals using a voltage-controlled-oscillator (VCO) circuit and more particularly, to the use of a linear variable gain amplifier rather than a non-linear hard limiter to remove unwanted signal modulation in VCO output signals.
2. Description of the Prior Art
Voltage-controlled-oscillator (VCO) circuits are typically used to deliver signals that are modified to be used as clock signals for timing and control in an integrated circuit. As an example, phase-locked loop (PLL) circuits often employ a VCO to provide the clocking means. Many current VCO circuit designs provide VCO output signals that exhibit low frequency amplitude modulations. One such cause for amplitude modulation at the VCO output is tail current modulation which could have many sources. For example, all differential circuits have tail devices supplying current. These tail devices on the other hand refer to reference devices for their current multiplication and these reference devices on the other hand, refer to op-amp stabilized current sources. If there is some instability in these operational amplifier devices, one could have a cascade effect, which could manipulate itself as tail current modulation.
An exaggerated example of amplitude modulation, due to tail current modulation is shown in FIG. 1 which illustrates an example VCO output signal 10 provided at an output of an amplitude detection device (not shown). The example VCO output signal 10 depicted, includes a carrier waveform of 1 GHz. As further shown in FIG. 1, the high frequency carrier is periodically amplitude modulated.
Prior to being used as a clock signal, this kind of amplitude modulation needs to be removed from the system or circuit in which the VCO is implemented.
While most common VCO design concentrate on the provision of a hard limiter designed to suppress amplitude modulation (AM), if a sinusoidal input is supplied and the limiter has a linear transfer curve, then the output is sinusoidal. At large input amplitudes, the limiter cuts off the peaks of the sine wave. These waveforms exhibit different zero-crossing delays when fed through a circuit of finite bandwidth. This leads to amplitude-modulation-pulse width modulation (AM-PM) conversion. It is very hard to establish a low AM-PM conversion with a hard limiter, and this is only established at high bandwidth-to-input frequency ratios, which come at the expense of considerable power dissipation. This kind of PM leads to deterministic jitter that must be avoided in clock signals.